SCIPHI Score-P and Cube Extensions for Intel Phi
Marc Schlütter (),
Christian Feld (),
Pavel Saviankou (),
Michael Knobloch (),
Marc-André Hermanns () and
Bernd Mohr ()
Additional contact information
Marc Schlütter: Forschungszentrum Jülich GmbH JSC, Jülich Supercomputing Centre, Forschungszentrum Jülich GmbH
Christian Feld: Forschungszentrum Jülich GmbH JSC, Jülich Supercomputing Centre, Forschungszentrum Jülich GmbH
Pavel Saviankou: Forschungszentrum Jülich GmbH JSC, Jülich Supercomputing Centre, Forschungszentrum Jülich GmbH
Michael Knobloch: Forschungszentrum Jülich GmbH JSC, Jülich Supercomputing Centre, Forschungszentrum Jülich GmbH
Marc-André Hermanns: JARA-HPC, Jülich Supercomputing Centre, Forschungszentrum Jülich GmbH
Bernd Mohr: JARA-HPC, Jülich Supercomputing Centre, Forschungszentrum Jülich GmbH
A chapter in Tools for High Performance Computing 2017, 2019, pp 85-104 from Springer
Abstract:
Abstract The Knights Landing processors offers unique features with regards to memory hierarchy and vectorization capabilities. To improve tool support within these two areas, we present extensions to the Score-P measurement infrastructure and the Cube report explorer. With the Knights Landing edition, Intel introduced a new memory architecture, utilizing two types of memory, MCDRAM and DDR4 SDRAM. To assist the user in the decision where to place data structures, we introduce a MCDRAM candidate metric to the Cube report explorer. In addition we track all MCDRAM allocations through the hbwmalloc interface, providing memory metrics like leaked memory or the high-water mark on a per-region basis, as already known for the ubiquitous malloc/free. A Score-P metric plugin that records memory statistics via numastat on a per process level enables a timeline analysis using the Vampir toolset. To get the best performance out of , the large vector processing units need to be utilized effectively. The ratio between computation and data access and the vector processing unit (VPU) intensity are introduced as metrics to identify vectorization candidates on a per-region basis. The Portable Hardware Locality (hwloc) Broquedis et al. (hwloc: a generic framework for managing hardware affinities in hpc applications, 2010 [2]) library allows us to visualize the distribution of the KNL-specific performance metrics within the Cube report explorer, taking the hardware topology consisting of processor tiles and cores into account.
Date: 2019
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Persistent link: https://EconPapers.repec.org/RePEc:spr:sprchp:978-3-030-11987-4_6
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DOI: 10.1007/978-3-030-11987-4_6
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