Designing Limit-Cycle Suppressor Using Dithering and Dual-Input Describing Function Methods

Elisabeth Tansiana Mbitu and Seng-Chi Chen
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Elisabeth Tansiana Mbitu: Electrical Engineering Department, Southern Taiwan University of Science and Technology, Tainan City 71005, Taiwan
Seng-Chi Chen: Electrical Engineering Department, Southern Taiwan University of Science and Technology, Tainan City 71005, Taiwan

Mathematics, 2020, vol. 8, issue 11, 1-14

Abstract: This paper described a method to design a limit-cycle suppressor. The dithering technique was used to eliminate self-sustained oscillations or limit cycles. Otherwise, the Dual Input Describing Function (DIDF) method was applied to design dither parameters and analyze the existence of limit cycles. This method was done in a nonlinear system with relay nonlinearity using three standard dither signals, namely sine, triangle, and square waves. The aim of choosing varying dithers was to investigate the effect of dither shapes and the minimum amplitude required for the quenching strategy. First, the possibility and amplitude of limit cycles were determined graphically on the DIDF curve. Then, the minimum amplitude of dither was calculated based on the DIDF analysis. Finally, a simulation was built to verify the analytical work using a digital computer. The simulation results were related to the analysis results. It was evident that the dithering technique is a simple way to suppress limit cycles in a nonlinear system. This paper also presented that dither is an amplitude function, and square-wave dither has the minimum amplitude to quench limit cycles.

Keywords: limit cycles; DIDF; dither signal; nonlinearity; relay system (search for similar items in EconPapers)
JEL-codes: C (search for similar items in EconPapers)
Date: 2020
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