Fault Ride through Capability Augmentation of a DFIG-Based Wind Integrated VSC-HVDC System with Non-Superconducting Fault Current Limiter
Md Shafiul Alam,
Mohammad Ali Yousef Abido,
Alaa El-Din Hussein and
Ibrahim El-Amin
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Md Shafiul Alam: Department of Electrical Engineering, King Fahd University of Petroleum & Minerals, Dhahran 31261, Saudi Arabia
Mohammad Ali Yousef Abido: Department of Electrical Engineering, King Fahd University of Petroleum & Minerals, Dhahran 31261, Saudi Arabia
Alaa El-Din Hussein: Department of Electrical Engineering, King Fahd University of Petroleum & Minerals, Dhahran 31261, Saudi Arabia
Ibrahim El-Amin: Department of Electrical Engineering, King Fahd University of Petroleum & Minerals, Dhahran 31261, Saudi Arabia
Sustainability, 2019, vol. 11, issue 5, 1-23
Abstract:
This paper proposes a non-superconducting bridge-type fault current limiter (BFCL) as a potential solution to the fault problems of doubly fed induction generator (DFIG) integrated voltage source converter high-voltage DC (VSC-HVDC) transmission systems. As the VSC-HVDC and DFIG systems are vulnerable to AC/DC faults, a BFCL controller is developed to insert sizeable impedance during the inception of system disturbances. In the proposed control scheme, constant capacitor voltage is maintained by the stator VSC (SVSC) controller, while current extraction or injection is achieved by rotor VSC (RVSC) controller. Current control mode-based active and reactive power controllers for an HVDC system are developed. Balanced and different unbalanced faults are applied in the system to show the effectiveness of the proposed BFCL solution. A DFIG wind-based VSC-HVDC system, BFCL, and their controllers are implemented in a real time digital simulator (RTDS). The performance of the proposed BFCL control strategy in DFIG-based VSC-HVDC system is compared with a series dynamic braking resistor (SDBR). Comparative RTDS implementation results show that the proposed BFCL control strategy is very efficient in improving system fault ride through (FRT) capability and outperforms SDBR in all cases considered.
Keywords: doubly fed induction generator (DFIG); voltage source converter (VSC); bridge-type fault current limiter (BFCL); series dynamic braking resistor (SDBR); fault ride through (FRT) capability (search for similar items in EconPapers)
JEL-codes: O13 Q Q0 Q2 Q3 Q5 Q56 (search for similar items in EconPapers)
Date: 2019
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Citations: View citations in EconPapers (7)
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Persistent link: https://EconPapers.repec.org/RePEc:gam:jsusta:v:11:y:2019:i:5:p:1232-:d:209154
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