Self-optimizing Concurrency in Software Transactional Memory via Model-based Approach

Pierangelo Di Sanzo (), Francesco Del Re (), Diego Rughetti (), Bruno Ciciani () and Francesco Quaglia ()
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Pierangelo Di Sanzo: Department of Computer, Control and Management Engineering, Universita' degli Studi di Roma "La Sapienza"
Francesco Del Re: Department of Computer, Control and Management Engineering, Universita' degli Studi di Roma "La Sapienza"
Diego Rughetti: Department of Computer, Control and Management Engineering, Universita' degli Studi di Roma "La Sapienza"
Bruno Ciciani: Department of Computer, Control and Management Engineering, Universita' degli Studi di Roma "La Sapienza"
Francesco Quaglia: Department of Computer, Control and Management Engineering, Universita' degli Studi di Roma "La Sapienza"

No 2013-07, DIAG Technical Reports from Department of Computer, Control and Management Engineering, Universita' degli Studi di Roma "La Sapienza"

Abstract: In the era of multi-core systems, the need for tools simplifying the development of concurrent applications is increasingly looming. In such a context, Software Transactional Memory (STM) is recognized as an effective programming paradigm, thanks to its ability to guarantee consistency of data that are shared across concurrent threads in an application transparent manner. On the other hand, a core problem to cope with for STM, which has received great attention of late, deals with (dynamically) regulating the degree of concurrency, in order to deliver optimal performance. In fact, depending on the application workload, whose profile can also change over time, an oversized number of concurrent threads may cause loss in performance due to excessive data contention, which may give rise to excessively high transaction abort rate. Conversely, an undersized number of threads may hamper performance due to limited exploitation of parallelism. We address this problem by proposing a self-regulation approach of the concurrency level, which leverages a parametric analytical performance model aimed at predicting the scalability of the STM application as a function of the actual workload profile and the number of concurrent threads supposed to sustaining the execution. The regulation scheme allows achieving optimal performance during the whole lifetime of the application via dynamically resizing the number of concurrent threads according to the predictions by the model. The later is customized for a specific application/platform pair through regression analysis, which is based on a lightweight sampling phase. We also present a real implementation of the model-based concurrency self-regulation architecture integrated within the open source TinySTM framework. Further, the effectiveness of the proposal is evaluated via an experimental assessment based on standard STM benchmark applications.

Keywords: Software Transactional Memory; performance modeling; concurrency regulation; self-tuning (search for similar items in EconPapers)
Pages: 24 pages
Date: 2013-07
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