Parasitic Loop Inductances Reduction in the PCB Layout in GaN-Based Power Converters Using S-Parameters and EM Simulations

Loris Pace, Nadir Idir, Thierry Duquesne and Jean-Claude De Jaeger
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Loris Pace: Arts et Metiers Institute of Technology, Centrale Lille, Junia, University Lille, ULR 2697-L2EP, F-59000 Lille, France
Nadir Idir: Arts et Metiers Institute of Technology, Centrale Lille, Junia, University Lille, ULR 2697-L2EP, F-59000 Lille, France
Thierry Duquesne: Arts et Metiers Institute of Technology, Centrale Lille, Junia, University Lille, ULR 2697-L2EP, F-59000 Lille, France
Jean-Claude De Jaeger: CNRS, Centrale Lille, University Lille, F-59000 Lille, France

Energies, 2021, vol. 14, issue 5, 1-17

Abstract: Due to the high switching speed of Gallium Nitride (GaN) transistors, parasitic inductances have significant impacts on power losses and electromagnetic interferences (EMI) in GaN-based power converters. Thus, the proper design of high-frequency converters in a simulation tool requires accurate electromagnetic (EM) modeling of the commutation loops. This work proposes an EM modeling of the parasitic inductance of a GaN-based commutation cell on a printed circuit board (PCB) using Advanced Design System (ADS ® ) software. Two different PCB designs of the commutation loop, lateral (single-sided) and vertical (double-sided) are characterized in terms of parasitic inductance contribution. An experimental approach based on S-parameters, the Cold FET technique and a specific calibration procedure is developed to obtain reference values for comparison with the proposed models. First, lateral and vertical PCB loop inductances are extracted. Then, the whole commutation loop inductances including the packaging of the GaN transistors are determined by developing an EM model of the device’s internal parasitic. The switching waveforms of the GaN transistors in a 1 MHz DC/DC converter are given for the different commutation loop designs. Finally, a discussion is proposed on the presented results and the development of advanced tools for high-frequency GaN-based power electronics design.

Keywords: GaN converter; commutation loop inductance; PCB layout; S-parameter; EM modeling; EMI (search for similar items in EconPapers)
JEL-codes: Q Q0 Q4 Q40 Q41 Q42 Q43 Q47 Q48 Q49 (search for similar items in EconPapers)
Date: 2021
References: View references in EconPapers View complete reference list from CitEc
Citations: View citations in EconPapers (3)

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