Sensorless Dual TSEP ( V th, R dson ) Implementation for Junction Temperature Measurement in Parallelized SiC MOSFETs

Louis Alauzet (), Patrick Tounsi and Jean-Pierre Fradin
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Louis Alauzet: Icam School of Engineering, Toulouse Campus, 31300 Toulouse, France
Patrick Tounsi: LAAS-CNRS, ESE, Université De Toulouse, 31031 Toulouse, France
Jean-Pierre Fradin: Icam School of Engineering, Toulouse Campus, 31300 Toulouse, France

Energies, 2025, vol. 18, issue 13, 1-15

Abstract: This article presents a method for detecting the temperature distribution of two parallelized Silicon Carbide (SiC) MOSFETs. Two thermally sensitive electrical parameters (TSEPs), namely the on-state resistance ( R d s o n ) and the threshold voltage ( V t h ), are introduced. A comparison of the temperatures interpolated by V t h and R d s o n shows disparity, enabling the detection of individual junction temperatures. V t h instability and its measurement are discussed for SiC devices. Experimental results show that, depending on the instability of the V t h and the sensitivity of the two TSEPs at certain temperatures, a combination of different TSEPs could be a solution for extracting the maximum junction temperature of parallelized devices.

Keywords: SiC MOSFETs; parallelization; thermal imbalance; thermo-sensitive electrical parameter; temperature; temperature measurement (search for similar items in EconPapers)
JEL-codes: Q Q0 Q4 Q40 Q41 Q42 Q43 Q47 Q48 Q49 (search for similar items in EconPapers)
Date: 2025
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