Lightweight VLSI Architectures for Image Encryption Applications

A. Prathiba, Suyash Vardhan Srivathshav, Ramkumar P. E., Rajkamal E. and Kanchana Bhaaskaran V. S.
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A. Prathiba: Vellore Institute of Technology, Chennai, India
Suyash Vardhan Srivathshav: Vellore Institute of Technology, Chennai, India
Ramkumar P. E.: Vellore Institute of Technology, Chennai, India
Rajkamal E.: Vellore Institute of Technology, Chennai, India
Kanchana Bhaaskaran V. S.: Vellore Institute of Technology, Chennai, India

International Journal of Information Security and Privacy (IJISP), 2022, vol. 16, issue 1, 1-23

Abstract: Lightweight cryptography offers significant security service in constrained environments such as wireless sensor networks and Internet of Things. The focus of this article is to construct lightweight SPN block cipher architectures with substitution box based on finite fields. The paper also details the FPGA implementation of the lightweight symmetric block cipher algorithm of SPN type with combinational S-box. Restructuring of traditional look-up-table Substitution Box (S-Box) sub-structure with a combinational logic S-box is attempted. Elementary architectures namely the basic round architecture and reduced datawidth architecture incorporating look-up-table and combinational S-Box substructure are compared in terms of area and throughput. Proposed restructure mechanism occupies less FPGA resources with no comprise in the latency and also demonstrates performance efficiency and low power consumption in Xilinx FPGAs. Robustness of the proposed method against various statistical attacks has been analyzed through comparison with other existing encryption mechanisms.

Date: 2022
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