A Review on SRAM Memory Design Using FinFET Technology

T. Venkata Lakshmi and M. Kamaraju
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T. Venkata Lakshmi: Gudlavalleru Engineering College, India
M. Kamaraju: Gudlavalleru Engineering College, India

International Journal of System Dynamics Applications (IJSDA), 2021, vol. 11, issue 6, 1-21

Abstract: An innovative technology named FinFET (Fin Field Effect Transistor) has been developed to offer better transistor circuit design and to compensate the necessity of superior storage system (SS). As gate loses control over the channel, CMOS devices faces some major issues like increase in manufacturing cost, less reliability and yield, increase of ON current, short channel effects (SCEs), increase in leakage currents etc. However, it is necessary for the memory to have less power dissipation, short access time and low leakage current. The traditional design of SRAM (Static RAM) using CMOS technology represents severe performance degradation due to its higher power dissipation and leakage current. Thus, a Nano-scaled device named FinFET is introduced for designing SRAM since it has three dimensional design of the gate. FinFET has been used to improve the overall performance and has been chosen as a transistor of choice because it is not affected by SCEs. In this work, we have reviewed various FinFET based SRAM cells, performance metrics and the comparison over different technologies.

Date: 2021
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