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CNT-molecule-CNT (1D-0D-1D) van der Waals integration ferroelectric memory with 1-nm2 junction area

Thanh Luan Phan, Sohyeon Seo, Yunhee Cho, Quoc An Vu, Young Hee Lee, Dinh Loc Duong (), Hyoyoung Lee () and Woo Jong Yu ()
Additional contact information
Thanh Luan Phan: Sungkyunkwan University
Sohyeon Seo: Sungkyunkwan University
Yunhee Cho: Sungkyunkwan University
Quoc An Vu: Center for Integrated Nanostructure Physics (CINAP), Institute for Basic Science (IBS)
Young Hee Lee: Center for Integrated Nanostructure Physics (CINAP), Institute for Basic Science (IBS)
Dinh Loc Duong: Center for Integrated Nanostructure Physics (CINAP), Institute for Basic Science (IBS)
Hyoyoung Lee: Sungkyunkwan University
Woo Jong Yu: Sungkyunkwan University

Nature Communications, 2022, vol. 13, issue 1, 1-8

Abstract: Abstract The device’s integration of molecular electronics is limited regarding the large-scale fabrication of gap electrodes on a molecular scale. The van der Waals integration (vdWI) of a vertically aligned molecular layer (0D) with 2D or 3D electrodes indicates the possibility of device’s integration; however, the active junction area of 0D-2D and 0D-3D vdWIs remains at a microscale size. Here, we introduce the robust fabrication of a vertical 1D-0D-1D vdWI device with the ultra-small junction area of 1 nm2 achieved by cross-stacking top carbon nanotubes (CNTs) on molecularly assembled bottom CNTs. 1D-0D-1D vdWI memories are demonstrated through ferroelectric switching of azobenzene molecules owing to the cis-trans transformation combined with the permanent dipole moment of the end-tail -CF3 group. In this work, our 1D-0D-1D vdWI memory exhibits a retention performance above 2000 s, over 300 cycles with an on/off ratio of approximately 105 and record current density (3.4 × 108 A/cm2), which is 100 times higher than previous study through the smallest junction area achieved in a vdWI. The simple stacking of aligned CNTs (4 × 4) allows integration of memory arrays (16 junctions) with high device operational yield (100%), offering integration guidelines for future molecular electronics.

Date: 2022
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DOI: 10.1038/s41467-022-32173-8

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