Architecture Design of a Single-chip Multiprocessor

Wenbin Yao (), Dongsheng Wang (), Weimin Zheng () and Songliu Guo ()
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Wenbin Yao: Tsinghua University, Department of Computer Science and Technology
Dongsheng Wang: Tsinghua University, Research Institute of Information Technology
Weimin Zheng: Tsinghua University, Department of Computer Science and Technology
Songliu Guo: Tsinghua University, Department of Computer Science and Technology

A chapter in Current Trends in High Performance Computing and Its Applications, 2005, pp 165-174 from Springer

Abstract: Abstract Single-chip multiprocessor(CMP) architecture provides an important research direction for the future microprocessors. A CMP architecture(TCMP) is put forward on the basis of the prior researches on RISC microprocessor. T-CMP integrating two MIPS-based processors is a closely coupled multiprocessor, engaging aggressive thread-level and process-level parallel techniques to improve the performance. This paper presents the key techniques of its implementation, including hardware construction and software design. A functional verification simulator is also developed to simulate the behavior of program executions in the mode of cycle-by-cycle. The results show that the design can improve the computing performance effectively.

Keywords: Single-chip multiprocessor; architecture; parallelism; functional verification simulator (search for similar items in EconPapers)
Date: 2005
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Persistent link: https://EconPapers.repec.org/RePEc:spr:sprchp:978-3-540-27912-9_16

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DOI: 10.1007/3-540-27912-1_16

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