Generic Support for Remote Memory Access Operations in Score-P and OTF2
Andreas Knüpfer (),
Robert Dietrich,
Jens Doleschal,
Markus Geimer,
Marc-André Hermanns,
Christian Rössel,
Ronny Tschüter,
Bert Wesarg and
Felix Wolf
Additional contact information
Andreas Knüpfer: TU Dresden, Center for Information Services and HPC (ZIH)
Robert Dietrich: TU Dresden, Center for Information Services and HPC (ZIH)
Jens Doleschal: TU Dresden, Center for Information Services and HPC (ZIH)
Markus Geimer: TU Dresden, Center for Information Services and HPC (ZIH)
Marc-André Hermanns: TU Dresden, Center for Information Services and HPC (ZIH)
Christian Rössel: TU Dresden, Center for Information Services and HPC (ZIH)
Ronny Tschüter: TU Dresden, Center for Information Services and HPC (ZIH)
Bert Wesarg: TU Dresden, Center for Information Services and HPC (ZIH)
Felix Wolf: TU Dresden, Center for Information Services and HPC (ZIH)
A chapter in Tools for High Performance Computing 2012, 2013, pp 57-74 from Springer
Abstract:
Abstract Remote memory access (RMA) describes the ability of a process to access all or parts of the memory belonging to a remote process directly, without explicit participation of the remote side. There are a number of parallel programming models based on RMA operations that are relevant for High Performance Computing (HPC). On the one hand, Partitioned Global Address Space (PGAS) language extensions use RMA operations as underlying communication substrate, e.g. Co-Array Fortran and UPC. On the other hand, RMA programming APIs provide so called one-sided data transfer primitives as an alternative to the classic two-sided message passing. In this paper, we describe how Score-P, a scalable performance measurement infrastructure for parallel applications, is extended to support trace-based performance analyses of RMA parallelization models. Emphasis is given to the generic event model we designed to record RMA operations in the OTF2 trace format across a range of one-sided APIs and libraries.
Keywords: Message Passing Interface; High Performance Computing; Memory Window; Collective Operation; Compute Unify Device Architecture (search for similar items in EconPapers)
Date: 2013
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Persistent link: https://EconPapers.repec.org/RePEc:spr:sprchp:978-3-642-37349-7_5
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DOI: 10.1007/978-3-642-37349-7_5
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