Computing via material topology optimisation

Alexander Safonov and Andrew Adamatzky

Applied Mathematics and Computation, 2018, vol. 318, issue C, 109-120

Abstract: We construct logical gates via topology optimisation (aimed to solve a station problem of heat conduction) of a conductive material layout. Values of logical variables are represented by high and low values of a temperature at given sites. Logical functions are implemented via the formation of an optimum layout of conductive material between the sites with loading conditions. We implement and and xor gates and a one-bit binary half-adder.

Keywords: Topology optimisation; Logical gates; Unconventional computing (search for similar items in EconPapers)
Date: 2018
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Persistent link: https://EconPapers.repec.org/RePEc:eee:apmaco:v:318:y:2018:i:c:p:109-120

DOI: 10.1016/j.amc.2017.08.030

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