Defects analysis and improvement of a chaotic logic gate

Yiyan Sheng and Wenbo Liu

Chaos, Solitons & Fractals, 2011, vol. 44, issue 9, 719-727

Abstract: We introduced one chaotic logic gate design and described its performance defects. These defects, namely nondeterminacy and variability of the output signal, were depicted and analysis for the reasons behind them was done. Further more, a new logic gate design by changing the variable under control is proposed. By successfully overcoming defects of the prototype, the new chaotic logic gate can be better applied to a complicated computing architecture.

Date: 2011
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Persistent link: https://EconPapers.repec.org/RePEc:eee:chsofr:v:44:y:2011:i:9:p:719-727

DOI: 10.1016/j.chaos.2011.06.007

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