An induction machine and power electronic test system on a field-programmable gate array

Christian Dufour, Sébastien Cense and Jean Bélanger

Mathematics and Computers in Simulation (MATCOM), 2016, vol. 130, issue C, 112-123

Abstract: This paper presents a field-programmable gate array (FPGA) test system composed of an induction machine, configurable as a doubly-fed induction machine or squirrel-cage induction machine, with power electronic converter models suitable for virtual motor drive control development and testing. The IM model is designed so that all parameters can be modified online without stopping the simulation. The power electronic part is customizable using a variable topology FPGA solver called Electric Hardware Solver (eHS). Permanent magnet synchronous machine and switched reluctance motor drive FPGA models are also discussed. The system is designed for fast design iteration process by allowing circuit and parameter modification using a unique bitstream. The system allows control engineers to validate production controllers in real-time, using virtual motor drives. The paper also briefly explains permanent magnet synchronous motor drives and switched reluctance motor drive implementations on FPGA.

Keywords: Induction motor drive; Hardware-In-the-Loop simulation; eFPGAsim; Permanent magnet synchronous motor (PMSM) drive; Switched reluctance motor (RSM) drive (search for similar items in EconPapers)
Date: 2016
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Persistent link: https://EconPapers.repec.org/RePEc:eee:matcom:v:130:y:2016:i:c:p:112-123

DOI: 10.1016/j.matcom.2016.03.014

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