 Large matrix–vector products on distributed bus networks with communication delays using the divisible load paradigm: performance analysis and simulationS.k Chan, V Bharadwaj and D Ghose Mathematics and Computers in Simulation (MATCOM), 2001, vol. 58, issue 1, 71-92 Abstract: We present a performance analysis and experimental simulation results on the problem of scheduling a divisible load on a bus network. In general, the computing requirement of a divisible load is CPU intensive and demands multiple processing nodes for efficient processing. We consider the problem of scheduling a very large matrix–vector product computation on a bus network consisting of a homogeneous set of processors. The experiment was conducted on a PC-based networking environment consisting of Pentium II machines arranged in a bus topology. We present a theoretical analysis and verify these findings on the experimental test-bed. We also developed a software support system with flexibility in terms of scalability of the network and the load size. We present a detailed discussion on the experimental results providing directions for possible future extensions of this work. Keywords: Divisible load; Matrix–vector product; Communication delay; Computation delay; Bus networks; Processing time minimisation (search for similar items in EconPapers) Downloads: (external link) Related works: Export reference: BibTeX RIS (EndNote, ProCite, RefMan) HTML/Text Persistent link: https://EconPapers.repec.org/RePEc:eee:matcom:v:58:y:2001:i:1:p:71-92 Access Statistics for this article Mathematics and Computers in Simulation (MATCOM) is currently edited by Robert Beauwens More articles in Mathematics and Computers in Simulation (MATCOM) from Elsevier |
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