Optimal hardware/software partitioning of a system on chip FPGA-based sensorless AC drive current controller

I. Bahri, L. Idkhajine, E. Monmasson and M.E.A. Benkhelifa

Mathematics and Computers in Simulation (MATCOM), 2013, vol. 90, issue C, 145-161

Abstract: The recent field programmable gate array (FPGA) system on chip devices offer a new degree of design freedom. Indeed, these digital components allow the combination of software treatment (by the on-chip processor cores) and hardware treatment (hardware architecture made by the interconnection of the FPGA logic cells). In the field of industrial control applications, this digital technology is appropriate to reach an optimum between the control performances, the controller algorithm complexity and the design flexibility. On the other hand, a co-design methodology is necessary to make an efficient partitioning of the control algorithm so as to define modules to be software-made and modules to be hardware-made.

Keywords: Field programmable gate array; System on chip; Co-design methodology; NSGA-II; Sensorless controller; Extended Kalman filter; Synchronous machine (search for similar items in EconPapers)
Date: 2013
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Persistent link: https://EconPapers.repec.org/RePEc:eee:matcom:v:90:y:2013:i:c:p:145-161

DOI: 10.1016/j.matcom.2012.06.008

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