Low-voltage organic transistors with an amorphous molecular gate dielectric

Marcus Halik (), Hagen Klauk, Ute Zschieschang, Günter Schmid, Christine Dehm, Markus Schütz, Steffen Maisch, Franz Effenberger, Markus Brunnbauer and Francesco Stellacci
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Marcus Halik: Infineon Technologies AG, New Memory Platforms, Materials and Technology
Hagen Klauk: Infineon Technologies AG, New Memory Platforms, Materials and Technology
Ute Zschieschang: Infineon Technologies AG, New Memory Platforms, Materials and Technology
Günter Schmid: Infineon Technologies AG, New Memory Platforms, Materials and Technology
Christine Dehm: Infineon Technologies AG, New Memory Platforms, Materials and Technology
Markus Schütz: University Stuttgart
Steffen Maisch: University Stuttgart
Franz Effenberger: University Stuttgart
Markus Brunnbauer: Massachusetts Institute of Technology
Francesco Stellacci: Massachusetts Institute of Technology

Nature, 2004, vol. 431, issue 7011, 963-966

Abstract: Abstract Organic thin film transistors (TFTs) are of interest for a variety of large-area electronic applications, such as displays1,2,3, sensors4,5 and electronic barcodes6,7,8. One of the key problems with existing organic TFTs is their large operating voltage, which often exceeds 20 V. This is due to poor capacitive coupling through relatively thick gate dielectric layers: these dielectrics are usually either inorganic oxides or nitrides2,3,4,5,6,7,8, or insulating polymers9, and are often thicker than 100 nm to minimize gate leakage currents. Here we demonstrate a manufacturing process for TFTs with a 2.5-nm-thick molecular self-assembled monolayer (SAM) gate dielectric and a high-mobility organic semiconductor (pentacene). These TFTs operate with supply voltages of less than 2 V, yet have gate currents that are lower than those of advanced silicon field-effect transistors with SiO2 dielectrics. These results should therefore increase the prospects of using organic TFTs in low-power applications (such as portable devices). Moreover, molecular SAMs may even be of interest for advanced silicon transistors where the continued reduction in dielectric thickness leads to ever greater gate leakage and power dissipation.

Date: 2004
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DOI: 10.1038/nature02987

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