Integrating photonics with silicon nanoelectronics for the next generation of systems on a chip

Amir H. Atabaki (), Sajjad Moazeni, Fabio Pavanello, Hayk Gevorgyan, Jelena Notaros, Luca Alloatti, Mark T. Wade, Chen Sun, Seth A. Kruger, Huaiyu Meng, Kenaish Al Qubaisi, Imbert Wang, Bohan Zhang, Anatol Khilo, Christopher V. Baiocco, Miloš A. Popović, Vladimir M. Stojanović and Rajeev J. Ram
Additional contact information
Amir H. Atabaki: Massachusetts Institute of Technology
Sajjad Moazeni: University of California, Berkeley
Fabio Pavanello: University of Colorado, Boulder
Hayk Gevorgyan: Boston University
Jelena Notaros: University of Colorado, Boulder
Luca Alloatti: Massachusetts Institute of Technology
Mark T. Wade: University of Colorado, Boulder
Chen Sun: University of California, Berkeley
Seth A. Kruger: State University of New York (SUNY) Polytechnic Institute
Huaiyu Meng: Massachusetts Institute of Technology
Kenaish Al Qubaisi: Boston University
Imbert Wang: Boston University
Bohan Zhang: Boston University
Anatol Khilo: Boston University
Christopher V. Baiocco: State University of New York (SUNY) Polytechnic Institute
Miloš A. Popović: Boston University
Vladimir M. Stojanović: University of California, Berkeley
Rajeev J. Ram: Massachusetts Institute of Technology

Nature, 2018, vol. 556, issue 7701, 349-354

Abstract: Abstract Electronic and photonic technologies have transformed our lives—from computing and mobile devices, to information technology and the internet. Our future demands in these fields require innovation in each technology separately, but also depend on our ability to harness their complementary physics through integrated solutions1,2. This goal is hindered by the fact that most silicon nanotechnologies—which enable our processors, computer memory, communications chips and image sensors—rely on bulk silicon substrates, a cost-effective solution with an abundant supply chain, but with substantial limitations for the integration of photonic functions. Here we introduce photonics into bulk silicon complementary metal–oxide–semiconductor (CMOS) chips using a layer of polycrystalline silicon deposited on silicon oxide (glass) islands fabricated alongside transistors. We use this single deposited layer to realize optical waveguides and resonators, high-speed optical modulators and sensitive avalanche photodetectors. We integrated this photonic platform with a 65-nanometre-transistor bulk CMOS process technology inside a 300-millimetre-diameter-wafer microelectronics foundry. We then implemented integrated high-speed optical transceivers in this platform that operate at ten gigabits per second, composed of millions of transistors, and arrayed on a single optical bus for wavelength division multiplexing, to address the demand for high-bandwidth optical interconnects in data centres and high-performance computing3,4. By decoupling the formation of photonic devices from that of transistors, this integration approach can achieve many of the goals of multi-chip solutions5, but with the performance, complexity and scalability of ‘systems on a chip’1,6–8. As transistors smaller than ten nanometres across become commercially available9, and as new nanotechnologies emerge10,11, this approach could provide a way to integrate photonics with state-of-the-art nanoelectronics.

Date: 2018
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DOI: 10.1038/s41586-018-0028-z

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