Modern microprocessor built from complementary carbon nanotube transistors
Gage Hills,
Christian Lau,
Andrew Wright,
Samuel Fuller,
Mindy D. Bishop,
Tathagata Srimani,
Pritpal Kanhaiya,
Rebecca Ho,
Aya Amer,
Yosi Stein,
Denis Murphy,
Arvind,
Anantha Chandrakasan and
Max M. Shulaker ()
Additional contact information
Gage Hills: Massachusetts Institute of Technology (MIT)
Christian Lau: Massachusetts Institute of Technology (MIT)
Andrew Wright: Massachusetts Institute of Technology (MIT)
Samuel Fuller: Analog Devices, Inc. (ADI)
Mindy D. Bishop: Massachusetts Institute of Technology (MIT)
Tathagata Srimani: Massachusetts Institute of Technology (MIT)
Pritpal Kanhaiya: Massachusetts Institute of Technology (MIT)
Rebecca Ho: Massachusetts Institute of Technology (MIT)
Aya Amer: Massachusetts Institute of Technology (MIT)
Yosi Stein: Analog Devices, Inc. (ADI)
Denis Murphy: Analog Devices, Inc. (ADI)
Arvind: Massachusetts Institute of Technology (MIT)
Anantha Chandrakasan: Massachusetts Institute of Technology (MIT)
Max M. Shulaker: Massachusetts Institute of Technology (MIT)
Nature, 2019, vol. 572, issue 7771, 595-602
Abstract:
Abstract Electronics is approaching a major paradigm shift because silicon transistor scaling no longer yields historical energy-efficiency benefits, spurring research towards beyond-silicon nanotechnologies. In particular, carbon nanotube field-effect transistor (CNFET)-based digital circuits promise substantial energy-efficiency benefits, but the inability to perfectly control intrinsic nanoscale defects and variability in carbon nanotubes has precluded the realization of very-large-scale integrated systems. Here we overcome these challenges to demonstrate a beyond-silicon microprocessor built entirely from CNFETs. This 16-bit microprocessor is based on the RISC-V instruction set, runs standard 32-bit instructions on 16-bit data and addresses, comprises more than 14,000 complementary metal–oxide–semiconductor CNFETs and is designed and fabricated using industry-standard design flows and processes. We propose a manufacturing methodology for carbon nanotubes, a set of combined processing and design techniques for overcoming nanoscale imperfections at macroscopic scales across full wafer substrates. This work experimentally validates a promising path towards practical beyond-silicon electronic systems.
Date: 2019
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DOI: 10.1038/s41586-019-1493-8
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