Ultrathin ferroic HfO2–ZrO2 superlattice gate stack for advanced transistors

Suraj S. Cheema (), Nirmaan Shanker, Li-Chen Wang, Cheng-Hsiang Hsu, Shang-Lin Hsu, Yu-Hung Liao, Matthew San Jose, Jorge Gomez, Wriddhi Chakraborty, Wenshen Li, Jong-Ho Bae, Steve K. Volkman, Daewoong Kwon, Yoonsoo Rho, Gianni Pinelli, Ravi Rastogi, Dominick Pipitone, Corey Stull, Matthew Cook, Brian Tyrrell, Vladimir A. Stoica, Zhan Zhang, John W. Freeland, Christopher J. Tassone, Apurva Mehta, Ghazal Saheli, David Thompson, Dong Ik Suh, Won-Tae Koo, Kab-Jin Nam, Dong Jin Jung, Woo-Bin Song, Chung-Hsun Lin, Seunggeol Nam, Jinseong Heo, Narendra Parihar, Costas P. Grigoropoulos, Padraic Shafer, Patrick Fay, Ramamoorthy Ramesh, Souvik Mahapatra, Jim Ciston, Suman Datta, Mohamed Mohamed, Chenming Hu and Sayeef Salahuddin ()
Additional contact information
Suraj S. Cheema: University of California, Berkeley
Nirmaan Shanker: University of California, Berkeley
Li-Chen Wang: University of California, Berkeley
Cheng-Hsiang Hsu: University of California, Berkeley
Shang-Lin Hsu: University of California, Berkeley
Yu-Hung Liao: University of California, Berkeley
Matthew San Jose: University of Notre Dame
Jorge Gomez: University of Notre Dame
Wriddhi Chakraborty: University of Notre Dame
Wenshen Li: University of California, Berkeley
Jong-Ho Bae: University of California, Berkeley
Steve K. Volkman: University of California
Daewoong Kwon: University of California, Berkeley
Yoonsoo Rho: University of California
Gianni Pinelli: Massachusetts Institute of Technology
Ravi Rastogi: Massachusetts Institute of Technology
Dominick Pipitone: Massachusetts Institute of Technology
Corey Stull: Massachusetts Institute of Technology
Matthew Cook: Massachusetts Institute of Technology
Brian Tyrrell: Massachusetts Institute of Technology
Vladimir A. Stoica: Pennsylvania State University
Zhan Zhang: Argonne National Laboratory
John W. Freeland: Argonne National Laboratory
Christopher J. Tassone: SLAC National Accelerator Laboratory
Apurva Mehta: SLAC National Accelerator Laboratory
Ghazal Saheli: Applied Materials
David Thompson: Applied Materials
Dong Ik Suh: Research & Development Division, SK hynix
Won-Tae Koo: Research & Development Division, SK hynix
Kab-Jin Nam: Semiconductor R&D Center, Samsung Electronics
Dong Jin Jung: Semiconductor R&D Center, Samsung Electronics
Woo-Bin Song: Semiconductor R&D Center, Samsung Electronics
Chung-Hsun Lin: Logic Technology Development, Intel Corporation
Seunggeol Nam: Samsung Advanced Institute of Technology, Samsung Electronics
Jinseong Heo: Samsung Advanced Institute of Technology, Samsung Electronics
Narendra Parihar: Indian Institute of Technology Bombay
Costas P. Grigoropoulos: University of California
Padraic Shafer: Lawrence Berkeley National Laboratory
Patrick Fay: University of Notre Dame
Ramamoorthy Ramesh: University of California, Berkeley
Souvik Mahapatra: Indian Institute of Technology Bombay
Jim Ciston: Lawrence Berkeley National Laboratory
Suman Datta: University of Notre Dame
Mohamed Mohamed: Massachusetts Institute of Technology
Chenming Hu: University of California, Berkeley
Sayeef Salahuddin: University of California, Berkeley

Nature, 2022, vol. 604, issue 7904, 65-71

Abstract: Abstract With the scaling of lateral dimensions in advanced transistors, an increased gate capacitance is desirable both to retain the control of the gate electrode over the channel and to reduce the operating voltage1. This led to a fundamental change in the gate stack in 2008, the incorporation of high-dielectric-constant HfO2 (ref. 2), which remains the material of choice to date. Here we report HfO2–ZrO2 superlattice heterostructures as a gate stack, stabilized with mixed ferroelectric–antiferroelectric order, directly integrated onto Si transistors, and scaled down to approximately 20 ångströms, the same gate oxide thickness required for high-performance transistors. The overall equivalent oxide thickness in metal–oxide–semiconductor capacitors is equivalent to an effective SiO2 thickness of approximately 6.5 ångströms. Such a low effective oxide thickness and the resulting large capacitance cannot be achieved in conventional HfO2-based high-dielectric-constant gate stacks without scavenging the interfacial SiO2, which has adverse effects on the electron transport and gate leakage current3. Accordingly, our gate stacks, which do not require such scavenging, provide substantially lower leakage current and no mobility degradation. This work demonstrates that ultrathin ferroic HfO2–ZrO2 multilayers, stabilized with competing ferroelectric–antiferroelectric order in the two-nanometre-thickness regime, provide a path towards advanced gate oxide stacks in electronic devices beyond conventional HfO2-based high-dielectric-constant materials.

Date: 2022
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DOI: 10.1038/s41586-022-04425-6

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