Hybrid 2D–CMOS microchips for memristive applications

Kaichen Zhu, Sebastian Pazos, Fernando Aguirre, Yaqing Shen, Yue Yuan, Wenwen Zheng, Osamah Alharbi, Marco A. Villena, Bin Fang, Xinyi Li, Alessandro Milozzi, Matteo Farronato, Miguel Muñoz-Rojo, Tao Wang, Ren Li, Hossein Fariborzi, Juan B. Roldan, Guenther Benstetter, Xixiang Zhang, Husam N. Alshareef, Tibor Grasser, Huaqiang Wu, Daniele Ielmini and Mario Lanza ()
Additional contact information
Kaichen Zhu: King Abdullah University of Science and Technology (KAUST)
Sebastian Pazos: King Abdullah University of Science and Technology (KAUST)
Fernando Aguirre: King Abdullah University of Science and Technology (KAUST)
Yaqing Shen: King Abdullah University of Science and Technology (KAUST)
Yue Yuan: King Abdullah University of Science and Technology (KAUST)
Wenwen Zheng: King Abdullah University of Science and Technology (KAUST)
Osamah Alharbi: King Abdullah University of Science and Technology (KAUST)
Marco A. Villena: King Abdullah University of Science and Technology (KAUST)
Bin Fang: King Abdullah University of Science and Technology (KAUST)
Xinyi Li: Tsinghua University
Alessandro Milozzi: Politecnico of Milan
Matteo Farronato: Politecnico of Milan
Miguel Muñoz-Rojo: University of Twente
Tao Wang: Soochow University
Ren Li: King Abdullah University of Science and Technology
Hossein Fariborzi: King Abdullah University of Science and Technology
Juan B. Roldan: University of Granada
Guenther Benstetter: Deggendorf Institute of Technology
Xixiang Zhang: King Abdullah University of Science and Technology (KAUST)
Husam N. Alshareef: King Abdullah University of Science and Technology (KAUST)
Tibor Grasser: TU Wien
Huaqiang Wu: Tsinghua University
Daniele Ielmini: Politecnico of Milan
Mario Lanza: King Abdullah University of Science and Technology (KAUST)

Nature, 2023, vol. 618, issue 7963, 57-62

Abstract: Abstract Exploiting the excellent electronic properties of two-dimensional (2D) materials to fabricate advanced electronic circuits is a major goal for the semiconductor industry1,2. However, most studies in this field have been limited to the fabrication and characterization of isolated large (more than 1 µm2) devices on unfunctional SiO2–Si substrates. Some studies have integrated monolayer graphene on silicon microchips as a large-area (more than 500 µm2) interconnection3 and as a channel of large transistors (roughly 16.5 µm2) (refs. 4,5), but in all cases the integration density was low, no computation was demonstrated and manipulating monolayer 2D materials was challenging because native pinholes and cracks during transfer increase variability and reduce yield. Here, we present the fabrication of high-integration-density 2D–CMOS hybrid microchips for memristive applications—CMOS stands for complementary metal–oxide–semiconductor. We transfer a sheet of multilayer hexagonal boron nitride onto the back-end-of-line interconnections of silicon microchips containing CMOS transistors of the 180 nm node, and finalize the circuits by patterning the top electrodes and interconnections. The CMOS transistors provide outstanding control over the currents across the hexagonal boron nitride memristors, which allows us to achieve endurances of roughly 5 million cycles in memristors as small as 0.053 µm2. We demonstrate in-memory computation by constructing logic gates, and measure spike-timing dependent plasticity signals that are suitable for the implementation of spiking neural networks. The high performance and the relatively-high technology readiness level achieved represent a notable advance towards the integration of 2D materials in microelectronic products and memristive applications.

Date: 2023
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DOI: 10.1038/s41586-023-05973-1

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