Wafer map defect pattern classification based on convolutional neural network features and error-correcting output codes

Cheng Hao Jin (), Hyun-Jin Kim (), Yongjun Piao (), Meijing Li () and Minghao Piao ()
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Cheng Hao Jin: ENN Research Institute of Digital Technology
Hyun-Jin Kim: BISTel
Yongjun Piao: Nankai University
Meijing Li: Shanghai Maritime University
Minghao Piao: Chungbuk National University

Journal of Intelligent Manufacturing, 2020, vol. 31, issue 8, No 4, 1875 pages

Abstract: Abstract Defect clusters on the wafer map can provide important clue to identify the process failures so that it is important to accurately classify the defect patterns into corresponding pattern types. In this research, we present an image-based wafer map defect pattern classification method. The presented method consists of two main steps: without any specific preprocessing, high-level features are extracted from convolutional neural network and then the extracted features are fed to combination of error-correcting output codes and support vector machines for wafer map defect pattern classification. To the best of our knowledge, no prior work has applied the presented method for wafer map defect pattern classification. Experimental results tested on 20,000 wafer maps show the superiority of presented method and the overall classification accuracy is up to 98.43%.

Keywords: Wafer map; Defect pattern classification; Deep learning; Convolutional neural network; Error-correcting output codes; Support vector machine; Multi-class classification (search for similar items in EconPapers)
Date: 2020
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Citations: View citations in EconPapers (8)

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DOI: 10.1007/s10845-020-01540-x

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