Optimal VLSI Delay Tuning by Wire Shielding

Binyamin Frankel () and Shmuel Wimer ()
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Binyamin Frankel: Bar-Ilan University
Shmuel Wimer: Bar-Ilan University

Journal of Optimization Theory and Applications, 2016, vol. 170, issue 3, No 20, 1060-1067

Abstract: Abstract Interconnect shielding is used in VLSI designs to avoid noise interference from the cross-coupling capacitance between adjacent signals. This paper takes advantage of the shields already present in the design and uses them to tune the propagation delay of the clock signals, thus eliminating expensive dedicated delay buffers. The problem of obtaining the desired delay at a minimum shielding cost (silicon area) is formulated as a calculus of variations problem. An analytical solution shows that a square root shield profile is optimal.

Keywords: Calculus of variations; Wire shielding; Delay tuning; 49K05 (search for similar items in EconPapers)
Date: 2016
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DOI: 10.1007/s10957-016-0960-8

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