Side channel attack resistant architecture for elliptic curve cryptosystem
Pravin Zode and
Raghavendra Deshmukh
Cyber-Physical Systems, 2018, vol. 4, issue 4, 205-215
Abstract:
Significant efforts are required for protection of cryptographic implementation in hostile environment, adversary injects fault in the cryptosystem by varying supply voltage, clock glitch and observe side channel information and tamper to break the cryptographic implementations. In this paper, side channel attack resistant architecture for elliptic curve cryptosystem using pseudo power noise generator, Xilinx IPs System Monitor and Digital Clock Management is proposed. These IPs are customisable and take less area on die size, provides sufficient security. The proposed architecture is robust and implemented without any major design efforts. The architecture is implemented on Xilinx ML605 embedded development board and the result shows that it take very less area as it uses vendor specific customisable IPs.
Date: 2018
References: Add references at CitEc
Citations:
Downloads: (external link)
http://hdl.handle.net/10.1080/23335777.2018.1515163 (text/html)
Access to full text is restricted to subscribers.
Related works:
This item may be available elsewhere in EconPapers: Search for items with the same title.
Export reference: BibTeX
RIS (EndNote, ProCite, RefMan)
HTML/Text
Persistent link: https://EconPapers.repec.org/RePEc:taf:tcybxx:v:4:y:2018:i:4:p:205-215
Ordering information: This journal article can be ordered from
http://www.tandfonline.com/pricing/journal/tcyb20
DOI: 10.1080/23335777.2018.1515163
Access Statistics for this article
Cyber-Physical Systems is currently edited by Yang Xiao
More articles in Cyber-Physical Systems from Taylor & Francis Journals
Bibliographic data for series maintained by Chris Longhurst ().