Anwendungsmöglichkeiten von Bounded Model Checking und affiner Arithmetik für die Verifikation von Analogschaltungen

A. Ehrenfried, Daniel Scholz and T. Welp

Publications of Darmstadt Technical University, Institute for Business Studies (BWL) from Darmstadt Technical University, Department of Business Administration, Economics and Law, Institute for Business Studies (BWL)

Date: 2006
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Published in Methoden und Beschreibungssprachen zur Modellierung und Verifikation von Schaltungen und Systemen : 9. ITG/GI/GMM Workshop, Bernd Straube ... (Hrsg.). - Dresden 2006. - S. 114-121 ISBN: 3-9810287-1-6 (2006)

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