A solid state time-division multiplier

A. Fuchs and H. Gafni

Mathematics and Computers in Simulation (MATCOM), 1962, vol. 4, issue 3, 138-142

Abstract: A multiplier, which is to form one of the units of a small transistorized analogue computer, is described. The multiplier is of the time division type proposed by Goldberg. Its main parts are, an integrator, switching circuits and a filter amplifier. The design specifications of these elements are derived from the accuracy and bandwidth properties of the multiplier. Tests carried out on an experimental model have shown that the accuracy is better than 0,5 % and the phase shift is less than 2° for 17 cps.

Date: 1962
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Persistent link: https://EconPapers.repec.org/RePEc:eee:matcom:v:4:y:1962:i:3:p:138-142

DOI: 10.1016/S0378-4754(62)80003-2

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